Please use this identifier to cite or link to this item:
http://arks.princeton.edu/ark:/88435/dsp018w32r823t
Title: | A TOY-8 Circuitry Simulation Algorithm |
Authors: | Zhao, David |
Advisors: | Leyzberg, Dan |
Department: | Computer Science |
Class Year: | 2017 |
Abstract: | While visual learning resources for many topics in introductory-level computer science abound, visualizations of the circuit-level workings of computer architecture are conspicuously absent from most curricula. Robert Sedgewick and Kevin Wayne’s imaginary 8-bit TOY microprocessor provides an ideal model for which to build an interactive visualizer to fill this gap. Previous work with TOY visualization has produced a proven method for graphical simulation but a non-ideal implementation for interactive purposes. We aim to fill that gap with an interactive, portable applet that simulates electric flow through circuit switch diagrams. We begin with a Scalable Vector Graphics file representing the full TOY architecture and proceed to parse and trans- form its Arithmetic Logic Unit (ALU) portion to create a working, interactive browser-side graphical simulation of a combinational digital electronic circuit. In contrast to previous work, we face additional challenges in the form of in- consistent data and greater scale and complexity of circuitry. In traversing the virtual graph representation of our circuit diagram, we also take a novel approach of using a hybrid depth-first-breadth-second search that guarantees deterministic traversal of intersections. We intend our procedure to be easily repurposable for extension to the full TOY architecture as well as to arbitrary circuit diagrams. |
URI: | http://arks.princeton.edu/ark:/88435/dsp018w32r823t |
Type of Material: | Princeton University Senior Theses |
Language: | en_US |
Appears in Collections: | Computer Science, 1988-2020 |
Files in This Item:
File | Size | Format | |
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written_final_report.pdf | 2.03 MB | Adobe PDF | Request a copy |
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