Advances in Fault Diagnosis Automation for Silicon Prototypes

Abstract

In the past decades, the growing complexity of modern computer chips has been presenting great challenges to integrated circuit (IC) designers. One of the biggest challenges in the modern IC design process is fault diagnosis. Fault diagnosis is the process of identifying faults in the initial IC prototypes by running and analyzing a set of tests. This process is still predominantly manual in industry. However, given the high complexity of fault diagnosis in modern ICs with billions of transistors, manual diagnosis is usually very time-consuming and expensive. To close this gap between IC complexity and the limited ability of manual fault diagnosis, it is necessary to apply greater use of automation to fault diagnosis.

To achieve this goal, this dissertation makes several novel contributions in automating fault diagnosis and presents multiple novel solutions for debugging silicon prototype chips. The first problem we address is the observability limitation during fault diagnosis in silicon prototypes. We propose a dynamic trace signal selection algorithm to enhance both permanent and transient fault coverage by using machine learning and integer linear programming techniques. The second problem this thesis focuses on is improving the scalability of existing automated fault diagnosis techniques. The scalability of contemporary decision procedures dictates the size of a design and the length of its execution trace window which we can analyze using symbolic techniques. We presented a novel Max-SAT-based diagnosis technique which addresses the scalability limit of automated symbolic reasoning using sliding windows and backbone analysis. The third problem addressed in this thesis is to accurately localize the root-cause of the errors across a sequence of sliding windows. To achieve this goal, we present a novel framework based on sequence interpolation and UNSAT core calculation to formalize the propagation of state information across sliding windows as a satisfiability problem.

In summary, by addressing the above problems, this dissertation presents scalable and accurate techniques for automated electrical fault diagnosis.