Low Cost Calibration and Control for Silicon Photonic Neural Networks

Abstract

Many innovations have changed the world of machine learning and information processing over the years. In recent times, neural networks have regained popularity as the leading branch in the field. This has ushered in a new era of research not only on the architecture of the networks, but also the architecture of the hardware used to implement them. Traditionally, neural networks have been implemented programmatically on computers operating under von Neumann architectures. Recently, neuromorphic electronics have been developed in an attempt to improve on this architecture. These hardware architectures, however, are limited in the bandwidth and efficiency with which they operate. Neural networks implemented in photonics show promise of much higher efficiency and bandwidth making them viable for applications that must perform in ultra-low latency environments such as real-time RF signal processing (gigahertz) and control of ultra-fast physical phenomena (microsecond).

Small off-chip photonic neural networks have previously been built and demonstrated by the Lightwave Lab showing that photonic neural networks are viable. These types of experiments are unfortunately not scalable since many components and instruments need to be wired together externally in order for the network to function. The goal of this thesis is to lay the groundwork that is necessary to make a fully integrated on-chip photonic neural network a reality. By providing a low-cost system that can control the parameters of multiple neurons, offering the final piece to the puzzle of how to link neurons together, and demonstrating the functionality of a fully on-chip neuron, this paper seeks to pave the road leading to a scalable, on-chip photonic neural network in the near future.