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http://arks.princeton.edu/ark:/88435/dsp016q182n19m| Title: | Simulator Using Bounded Propagation as Delay Model for Timing Analysis of Combinational Logic Circuits |
| Authors: | Coumeri, Sari |
| Advisors: | Malik |
| Department: | Electrical Engineering |
| Class Year: | 1992 |
| Extent: | 13 Pages |
| Other Identifiers: | 6729 |
| URI: | http://arks.princeton.edu/ark:/88435/dsp016q182n19m |
| Location : | This thesis can be viewed in person at the Mudd Manuscript Library. To order a copy complete the Senior Thesis Request Form. For more information contact mudd@princeton.edu. |
| Type of Material: | Princeton University Senior Theses |
| Appears in Collections: | Electrical Engineering, 1932-2020 |
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