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http://arks.princeton.edu/ark:/88435/dsp013x816p64f| Title: | Design Rule Checker on Celoxica's RC1000-PP with Xilinx Virtex 4000E FPGA |
| Authors: | Model, Joshua T. Kulansky, David M. |
| Advisors: | Luo, Zhen |
| Department: | Electrical Engineering |
| Class Year: | 2001 |
| Extent: | 11 Pages |
| Other Identifiers: | 14622 |
| URI: | http://arks.princeton.edu/ark:/88435/dsp013x816p64f |
| Location : | This thesis can be viewed in person at the Mudd Manuscript Library. To order a copy complete the Senior Thesis Request Form. For more information contact mudd@princeton.edu. |
| Type of Material: | Princeton University Senior Theses |
| Appears in Collections: | Electrical Engineering, 1932-2020 |
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