Please use this identifier to cite or link to this item:
http://arks.princeton.edu/ark:/88435/dsp012n49t212m| Title: | Hierarchical TLB for Parallel Workloads on Chip Multiprocessors |
| Authors: | Fazio III, Anthony T |
| Advisors: | Martonosi, Margaret R |
| Contributors: | August, David I |
| Department: | Computer Science |
| Class Year: | 2010 |
| Extent: | 26 Pages |
| Format: | Contains color or special media |
| Other Identifiers: | 24449 |
| URI: | http://arks.princeton.edu/ark:/88435/dsp012n49t212m |
| Location : | This thesis can be viewed in person at the Mudd Manuscript Library. To order a copy complete the Senior Thesis Request Form. For more information contact mudd@princeton.edu. |
| Type of Material: | Princeton University Senior Theses |
| Appears in Collections: | Computer Science, 1988-2020 |
Files in This Item:
There are no files associated with this item.
Items in Dataspace are protected by copyright, with all rights reserved, unless otherwise indicated.